Principal Engineer,
Intel Technology Sdn. Bhd.
TS Yeoh joined Intel in 1987 as a Product Quality & Reliability and Failure Analysis engineer working on microcontrollers. He then led the Q&R and Automotive product groups within the Product Development Quality & Reliability (PDQRE) department. This was followed with TS co-managing the PDQRE department from 1998-2002. He is currently a Principal Engineer from Assembly Test Manufacturing operations, with technical focus on Manufacturing & Device ESD (Electrostatic Discharge) and TRIZ (Theory of Inventive Problem Solving). While working, TS pursued his post graduate degrees from Universiti Sains Malaysia through part-time research. In 1989, he obtained his MSc in Solid State Physics and in 1997, his PhD in Applied Physics. He has also published a couple of papers in journals, internal and external conferences. These include IEEE International Reliability Physics Symposium, IEEE International Physical & Failure Analysis of IC Symposium, IEEE Transactions on Semiconductor Manufacturing Journal, Acta Crystallografica Journal, Journal of Physical Society of Japan and IEEE International Conference on Semiconductor Electronics.
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Presentation Title
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Systematic Innovation in Manufacturing – Introduction to TRIZ
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Abstract:
Semiconductor manufacturing faces numerous challenges and increased complexity in yield improvement, defect reduction and equipment related issues. Innovation is a key element to stay ahead of the competitors. Typically idea generation is through brainstorming but it has limitations.
This presentation will introduce a systematic innovation methodology called Theory of Inventive Problem Solving (TRIZ). It is a structured methodology for modeling the problem, tools to work with the models and finally models of solutions. TRIZ is a recognized international science of creativity, based on the laws of Physics and innovative patents distilled to numerous problem solving tools. It is a toolbox with 12 tools which provide the engineers with methods to create breakthrough ideas. This presentation will describe some of the methods/tools i.e. Trimming, Contradictions, Inventive Principles; along with actual manufacturing case studies.
In summary, TRIZ is used for faster problem resolution and to help engineers to be more creative and innovate. To-date, approximately 600 Assembly Test Manufacturing engineers have been trained, with more than US$15M of savings.
Senior Principal Design Engineer
Intel Corporation
He started working in Intel since January 2003. His current research focus is on radio architecture and circuit design that leverages the strengths and compensates for the weaknesses of CMOS technology. He received a Ph.D. in electrical engineering from the University of California at Berkeley in 1978.
Before joining Intel, he was with Tektronix, TriQuint, and Maxim. Stewart has developed high-speed analog, data converter, and wireless / RF integrated circuits. He has forty two issued patents, and twenty-two pending. He is the author of more than fifty technical papers.
Stewart served on the program committee of the International Solid-State Circuits Conference for ten years, chairing the Analog Subcommittee for four years. He was the conference Program Chair in 1999. He was an Associate Editor of the IEEE Journal of Solid-State Circuits, and the recipient of the IEEE Third Millennium Medal for Outstanding Achievements and Contributions from the Solid-State Circuits Society. Stewart has taught part-time at Portland State University, Oregon State University, and the Oregon Graduate Institute for twenty nine years. He is an IEEE Fellow.
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Presentation Title
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Multi-Radio Platforms in Scaled CMOS Technology
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Abstract:
Notebook computers and handheld devices employ multi-radio platforms to stay connected anywhere, anytime. This presents many challenges in terms of economics and co-existence.
This talk reviews some of these challenges, and describes how CMOS technology can be used to implement low-cost radio platforms.
Senior Staff Engineer
Intel Technology Sdn Bhd, Penang, Malaysia
Anwar Ali is a Senior Staff Engineer for Operational Modeling. He leads a team of Operations Research practitioners in applying discrete event simulation and optimization techniques to assist Assembly Test Manufacturing (ATM) factories improve productivity. Anwar also collaborates with Malaysia universities in initiatives to apply science to manufacturing. Anwar holds a Masters degree in Decision Science. He has been in Intel for 18 years. His e-mail is
anwar.ali@intel.com
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Presentation Title
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Applying Equipment Simulation for Productivity Improvement – Intel’s Experience
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Abstract:
The increasing complexities of Assembly Test equipment require the use of dynamic simulation models for accurate equipment capability prediction to enable lean capital expenditure. The drive for lean direct labor requires the models to be extended for downtime and human interaction considerations to ensure no compromise to equipment output. We share our experience in building and extending the models.
The high fidelity dynamic equipment simulation models were originally developed for best case equipment capability prediction and mimics detailed equipment movement and activities faithfully. Extensive uses of kinematics graphics ease model verification and model acceptance by customers. Models are validated to match the actual machine times with typical 98% accuracy.
The models were used to predict best case equipment capability with different media densities, processing times, and equipment configuration. The benefits of improvement ideas were quantified by the models to select the best option to be pursued.
The models were then extended for downtime and human interaction considerations. Models were validated against multi-observation study direct labor utilization. Model inputs include different direct labor per equipment ratio, skill sets, downtime scenarios, and product loading. Model experiments were able to quantify trade-offs between aggressive direct labor goals and its impact to output.
