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by Andrew Binstock

By placing multiple processor cores on its chips, Intel ramps up performance once again. What are processor cores and why should you care? Find out.

Last May, Intel announced that future generations of its Itanium® processors, Pentium® processors, and Intel® Xeon® processors would rely on multi-core architecture. By announcing this new design, Intel revealed how it will improve platform performance and capabilities while facing the increasing challenge of power consumption. This article explains what multi-core is, how it works, and why it’s important to the software industry as well as to buyers of PCs and servers.

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At its simplest, multi-core is a design in which a single physical processor contains the core logic of more than one processor. It’s as if an Intel Xeon processor were opened up and inside were packaged all the circuitry and logic for two (or more) Intel Xeon processors. The multi-core design puts several such processor “cores” and packages them as a single physical processor. The goal of this design is to enable a system to run more tasks simultaneously and thereby achieve greater overall system performance.

To many readers, the multi-core design will have a familiar ring. The Intel® Pentium® 4 and Intel Xeon processors today already use Hyper-Threading Technology (HT Technology) to execute multiple programs simultaneously. But HT Technology and multi-core designs differ significantly and deliver different performance characteristics. The key differentiator lies in how a program’s instructions are executed. To get at this difference, we need to review how multiple threads are run on today’s servers and desktops.

Multithreading, Hyper-Threading, or Multi-Core?

Programs are made up of execution threads. These threads are sequences of related instructions. In the early days of the PC, most programs consisted of a single thread. The operating systems in those days were capable of running only one such program at a time. The result was—as some of us painfully recall—that your PC would freeze while it printed a document or a spreadsheet. The system was incapable of doing two things simultaneously. Innovations in the operating system introduced multitasking in which one program could be briefly suspended and another one run. By quickly swapping programs in and out in this manner, the system gave the appearance of running the programs simultaneously. However, the underlying processor was, in fact, at all times running just a single thread.

By the beginning of this decade, processor design had gained additional execution resources (such as logic dedicated to floating-point and integer math) to support executing multiple instructions in parallel. Intel saw an opportunity in these extra facilities. The company reasoned it could make better use of these resources by employing them to execute two separate threads simultaneously on the same processor core. Intel named this simultaneous processing Hyper-Threading Technology and released it on the Intel Xeon processors in 2003. According to Intel benchmarks, appli cations that were written using multiple threads could see improvements of up to 30% by running on processors with HT Technology. More important, however, two programs could now run simultaneously on a processor without having to be swapped in and out (See Figure 1.) To induce the operating system to recognize one processor as two possible execution pipelines, the new chips were made to appear as two logical processors to the operating system.

Figure 1. HT Technology enables two threads to execute simultaneously on a single processor core

The performance boost of HT Technology was limited by the availability of shared resources to the two executing threads. As a result, HT Technology cannot approach the processing throughput of two distinct processors because of the contention for these shared resources. To achieve greater performance gains on a single chip, a processor would require two separate cores, such that each thread would have its own complete set of execution resources. Enter multi-core.

Multi-Core Processors

Multi-core processors, as the name implies, contain two or more distinct cores in the same physical package. Figure 2 shows how this appears in relation to previous technologies.

Figure 2. Multi-Core processors have multiple execution cores on a single chip

In this design, each core has its own execution pipeline. And each core has the resources required to run without blocking resources needed by the other software threads.

While the example in Figure 2 shows a two-core design, there is no inherent limitation in the number of cores that can be placed on a single chip. Intel has committed to shipping dual-core processors in 2005, but it will add additional cores in the future. Mainframe processors today use more than two cores, so there is precedent for this kind of development.

The multi-core design enables two or more cores to run at somewhat slower speeds and at much lower temperatures. The combined throughput of these cores delivers processing power greater than the maximum available today on single-core processors and at a much lower level of power consumption. In this way, Intel increases the capabilities of server platforms as predicted by Moore’s Law while the technology no longer pushes the outer limits of physical constraints.

Software Implications

Multi-core systems will deliver benefits to all software, but especially multi-threaded programs. All code that supports HT Technology or multiple processors, for example, will benefit automatically from multi-core processors, without need for modification. Most server-side enterprise packages and many desktop productivity tools fall into this category; as do most of today’s operating systems. Single-threaded applications still benefit from multi-core (although they do not gain the full advantages offered by the technology), because while they are executing, the operating system can execut e tasks on the other cores without interrupting the running program for access to the processor.

Finally, multi-core processors are well-positioned to bring performance benefits to emerging software usage models such as virtualization, service-oriented architecture (SOA), and Web services, which require concurrent execution of multiple processes.

Some vendors of databases and infrastructure software charge for their products on the basis of the number of processors present on the host system. With the release of HT Technology, which doubled the number of possible execution pipelines, these vendors chose to continue pricing their products based on the number of physical processors present. To allay customer concerns regarding multi-core processors, some software vendors have already announced license policies to include multi-processors. For example, Microsoft has announced that Windows XP* and Windows Server* 2003 will count only physical processors (not cores) toward the license fee. With this announcement, customers can double the number of processor cores on their systems without needing to pay for additional CPU licenses.

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The hardware platform must the target total system throughput, rather than the execution speed of a single task. In other words, the hardware must make all tasks run faster as well as increase the capabilities to end-users. Intel was the first company to deliver on this vision when it shipped processors with HT Technology in 2002. Now, with the imminent release of multi-core processors, the company delivers a more powerful solution that will have favorable implications not only for PCs, but for workgroup and departmental servers as well. The first multi-core processors are slated to appear in 2005, followed by a rapid top-to-bottom transition in 2006. When they do, this site will provide additional information as well as advice for customers making the transition to this new technology.

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• Intel Software Development Products include Compilers, Performance Analyzers, Performance Libraries and Threading Tools.

 

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Andrew Binstock is the principal analyst at Pacific Data Works LLC. He was previously a senior technology analyst at PricewaterhouseCoopers, and earlier editor in chief of UNIX Review and C Gazette. He is the lead author of "Practical Algorithms for Programmers," from Addison-Wesley Longman, which is currently in its 12th printing and in use at more than 30 computer-science departments in the United States.

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