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Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.1 Design Guidelines

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Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.1 Design Guidelines
This document defines the DC-to-DC converters to meet the processor power requirements of the following platforms:
VRM/EVRD 11.1 Supported Platforms and Processors: Intel® Xeon® 5500 Platforms
Intel® Xeon® Processor 5500 Series Performance WS Processor 130W
Intel Xeon Processor 5500 Series Performance Proc 95W
Intel Xeon Processor 5500 Series Volume Performance Processor 80W
Intel Xeon Processor 5500 Series Ultra Dense Processor 60W
Intel Xeon Processor 5500 Processor 38W
Some requirements will vary according to the needs of different computer systems and processors. The intent of this document is to define the electrical, thermal and mechanical design specifications for VRM/EVRD 11.1.
VRM – The voltage regulator module (VRM) designation in this document refers to a voltage regulator that is plugged into a baseboard via a connector or soldered in with signal and power leads, where the baseboard is designed to support more than one processor. VRM output requirements in this document are intended to match the needs of a set of microprocessors.
EVRD – The enterprise voltage regulator down (EVRD) designation in this document refers to a voltage regulator that is permanently embedded on a baseboard. The EVRD output requirements in this document are intended to match the needs of a set of microprocessors.
‘1’ – In this document, refers to a high voltage level (VOH and VIH).
‘0’ – In this document, refers to a low voltage level (VOL and VIL).
‘X’ – In this document, refers to a high or low voltage level (Don’t Care).
‘#’ – Symbol after a signal name in this document, refers to an active low signal, indicating that a signal is in the asserted state when driven to a logic low level.
VRM/EVRD 11.1 incorporates functional changes from prior VRM/EVRD 11.0 design guidelines:
• Enhanced power-on sequence Support only for VR 11.0 VID 8-bit table and 6.25 mV resolution with a 0.5 V to 1.6 V VID range
• Fixed Load Line at 0.8 m
• Several new I/O signals – introduced
Read the full Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 11.1 Design Guidelines.